We are looking for a Senior SoC Verification Engineer with strong experience in SoC/IP verification and hands-on expertise in modern verification methodologies. The candidate will be responsible for end-to-end SoC verification, test planning, debugging complex issues, and driving coverage closure activities.
Key Skills
Strong expertise in UVM and SystemVerilog
Strong understanding of AXI and AHB protocols
Exposure to PCIe, USB, DDR, Ethernet, CXL, and UCIe protocols
Experience in C-based testing and verification
Hands-on experience in SoC/IP level verification and test planning
Experience with GLS (Gate-Level Simulation) and UPF/power-aware verification
Strong debugging skills for complex SoC verification issues
Experience in coverage closure methodologies
Scripting knowledge in Python and/or Perl
Strong analytical and problem-solving skills
Responsibilities
Drive end-to-end SoC verification activities and test execution
Develop and maintain reusable verification environments and testbenches
Create and execute verification plans, test cases, and coverage models
Debug complex RTL, protocol, and system-level issues
Collaborate closely with design and cross-functional teams for issue resolution
Drive functional and code coverage closure activities
Support GLS and low-power verification activities
Mentor junior engineers and contribute to improving verification workflows and methodologies
Preferred Skills
Exposure to low-power verification techniques
Familiarity with assertions and advanced verification methodologies
Experience working with industry-standard EDA tools
Soft Skills
Good communication and collaboration skills
Ability to work independently and handle multiple tasks
Strong ownership and execution mindset
CareerFit
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